Electronics Assembly & Packaging >> Kulicke & Soffa, Singapore

Advanced Packaging (Hybrid)

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      Detailed Specs

      Wafer Level Packaging (WLP)
      Bonding Flip Chips and/or Passives onto wafers or panels
      Processing wafers sizes up to 12″ and larger
      Cam-X and Secs-Gem compatible
      Feeding from wafer, waffle pack, tray or tape and reel
      Full controlled Placement force for thin Flip Chips or low profile passives
      Full traceability
      Fine pitch Copper Pillar Bumps

      MCM & SIP/FC BGA/FC-CSP/ FC-Memory/FCOB
      Up to 27,000 cph (IPC) Flip Chip bonding speeds
      Up to 140,000 cph (IPC) Chip shooting speeds
      High quality pick and placement process
      7 Micron for Flips Chips, Die and Wafer Level Packages
      Full controlled Placement force for thin Flip Chips or low profile passives
      Feeding from wafer, waffle pack, tray or tape and reel

      POP (Package-on-Package)
      Die or BGA stacking at the highest throughput on smallest footprint
      Feeding from wafer, waffle pack, tray or tape and reel
      Full force control with every Placement at all placement height
      Easy to exchange linear flux unit